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19-1078; Rev 0; 6/96
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog
_______________General Description
The MAX6301/MAX6302/MAX6303/MAX6304* lowpower microprocessor (P) supervisory circuits provide maximum adjustability for reset and watchdog functions. The reset threshold can be adjusted to any voltage above 1.22V, using external resistors. In addition, the reset and watchdog timeout periods are adjustable using external capacitors. A watchdog select pin extends the watchdog timeout period to 500x. The reset function features immunity to power-supply transients. These four devices differ only in the structure of their reset outputs (see Selector Guide). The MAX6301-MAX6304 are available in the space-saving 8-pin MAX package, as well as 8-pin DIP/SO.
____________________________Features
o Adjustable Reset Threshold o Adjustable Reset Timeout o Adjustable Watchdog Timeout o 500x Watchdog Timeout Multiplier o 4A Supply Current o RESET or RESET Output Options o Push/Pull or Open-Drain Output Options o Guaranteed RESET Asserted At or Above VCC = 1V (MAX6301/MAX6303) o Power-Supply Transient Immunity o Watchdog Function Can Be Disabled o DIP/SO/MAX Packages Available
MAX6301-MAX6304
________________________Applications
Medical Equipment Intelligent Instruments Portable Equipment Battery-Powered Computers/Controllers Embedded Controllers Critical P Monitoring Set-Top Boxes Computers
______________Ordering Information
PART MAX6301CPA MAX6301CSA MAX6301CUA MAX6301EPA TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C PIN-PACKAGE 8 Plastic DIP 8 SO 8 MAX 8 Plastic DIP
_____________________Selector Guide
FEATURE Active-Low Reset Active-High Reset Open-Drain Reset Output Push/Pull Reset Output Pins-Package MAX6301 MAX6302 MAX6303 MAX6304 -- -- -- -- -- -- -- --
MAX6301ESA -40C to +85C 8 SO Ordering Information continued at end of data sheet.
__________Typical Operating Circuit
VIN MAX6301 ONLY R1 1 R2 2 GND RESET 7 (RESET) RL MAX6302 ONLY I/O RESET P RESET IN VCC 8 RL 0.1F
8-DIP/SO/ 8-DIP/SO/ 8-DIP/SO/ 8-DIP/SO/ MAX MAX MAX MAX
__________________Pin Configuration
TOP VIEW
RESET IN 1 GND 2 SRT 3 SWT 4 8 VCC RESET (RESET) WDI WDS
MAX6301 MAX6302 MAX6303 MAX6304
7 6 5
MAX6301 MAX6302 3 WDI 6 SRT MAX6303 4 5 SWT MAX6304 WDS
CSRT CSWT
DIP/SO/MAX
( ) ARE FOR MAX6302/MAX6304. ( ) ARE FOR MAX6302/MAX6304.
WDS = 0 FOR NORMAL MODE WDI = 1 FOR EXTENDED MODE
* Patents pending
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
ABSOLUTE MAXIMUM RATINGS
VCC .......................................................................-0.3V to +7.0V RESET IN, SWT, SRT ..................................-0.3V to (VCC + 0.3V) WDI, WDS..............................................................-0.3V to +7.0V RESET, RESET MAX6301 ...........................................................-0.3V to +7.0V MAX6302/6303/6304 ..............................-0.3V to (VCC + 0.3V) Input Current VCC ...............................................................................20mA GND..............................................................................20mA Output Current RESET, RESET..............................................................20mA Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 9.09mW/C above +70C) ............727mW SO (derate 5.88mW/C above +70C) .........................471mW MAX (derate 4.10mW/C above +70C) ....................330mW Operating Temperature Ranges MAX630_C_A ......................................................0C to +70C MAX630_E_A ...................................................-40C to +85C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25C.) PARAMETER Operating Voltage Range (Note 1) Supply Current (Note 2) RESET TIMER Reset Input Threshold Voltage Reset Input Hysteresis Reset Input Leakage Current Reset Output Voltage High (MAX6302/MAX6303/MAX6304) VTH VHYST IRESET IN VCC 4.5V, ISOURCE = 0.8mA VOH VCC = 2V, ISOURCE = 0.4mA MAX6302/MAX6304, VCC = 1.31V, RL = 10k VCC 4.5V, ISINK = 3.2mA VCC = 2V, ISINK = 1.6mA Reset Output Voltage Low (MAX6301/MAX6303/MAX6304) VOL MAX6301/ MAX6303 VCC = 1V, ISINK = 50A, TA = 0C to +70C VCC = 1.2V, ISINK = 100A, TA = -40C to +85C 63 26 2.8 4.0 5.2 1 1 VCC - 0.3 0.4 0.4 0.3 0.3 s s ms A V VCC - 0.4 VCC - 0.4 V VRESET IN falling, VCC = 5.0V VRESET IN rising, VCC = 5.0V 1.195 1.220 1.240 20 0.01 1 1.245 1.265 V mV nA SYMBOL VCC ICC CONDITIONS MAX6301C/MAX6303C MAX6301E/MAX6303E MAX6302/MAX6304 No load MIN 1.00 1.20 1.31 4.0 TYP MAX 5.50 5.50 5.50 7.0 A V UNITS
VCC to Reset Delay Reset Input Pulse Width Reset Timeout Period (Note 3) Reset Output Leakage Current
tRD tRI tRP
VCC falling at 1mV/s Comparator overdrive = 50mV CSRT = 1500pF MAX6301, V RESET = VCC MAX6302, VRESET = GND
2
_______________________________________________________________________________________
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25C.) PARAMETER WATCHDOG TIMER WDI, WDS Input Threshold WDI Pulse Width WDI, WDS Leakage Current WDI Sink/Source Current (Note 4) Watchdog Timeout Period (Note 3) tWD VIH VIL tWP VCC = 4.5V to 5.5V VCC = 2V to 4.5V Extended mode disabled Extended mode enabled WDS = GND, CSWT = 1500pF WDS = VCC, CSWT = 1500pF 2.8 1.4 70 4.0 2.0 5.2 2.6 30 60 1 0.7VCC 0.3VCC V ns A A ms sec SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX6301-MAX6304
Note 1: Reset is guaranteed valid from the selected reset threshold voltage down to the minimum VCC. Note 2: VDS = VCC, WDI unconnected. Note 3: Precision timing currents of 500nA are present at both the SRT and SWT pins. Timing capacitors connected to these nodes must have low leakage consistent with these currents to prevent timing errors. Note 4: The sink/source is supplied through a resistor, and is proportional to VCC (Figure 8). At VCC = 2V, it is typically 24A.
__________________________________________Typical Operating Characteristics
(CSWT = CSRT = 1500pF, TA = +25C, unless otherwise noted.)
RESET TIMEOUT PERIOD vs. CSRT
6301-4 TOC-01
EXTENDED-MODE WATCHDOG TIMEOUT PERIOD vs. CSWT (WDS = VCC)
6301-4 TOC-02
NORMAL-MODE WATCHDOG TIMEOUT PERIOD vs. CSWT (WDS = GND)
VCC = 5V WATCHDOG TIMEOUT PERIOD (ms)
6301-4 TOC-03
10,000 RESET TIMEOUT PERIOD (ms)
10,000 WATCHDOG TIMEOUT PERIOD (sec)
VCC = 5V
VCC = 5V
10,000
1000
1000
1000
100
100
100
10
10
10
1
1
1
0 0.001 0.01 0.1 1 CSRT (nF) 10 100 1000
0 0.001 0.01 0.1 1 CSWT (nF) 10 100 1000
0.1 0.001 0.01 0.1 1 CSWT (nF) 10 100 1000
_______________________________________________________________________________________
3
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
____________________________Typical Operating Characteristics (continued)
(CSWT = CSRT = 1500pF, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
6301-4 TOC-04
RESET AND NORMAL-MODE WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE
6301-4 TOC-05
MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE (VRST)
120 110 100 90 80 70 60 50 40 30 20 10 0 VRST = 4.60V 0 200 400 600 800 1000 RESET OCCURS ABOVE THE CURVE SEE NEGATIVE-GOING VCC TRANSIENTS SECTION
6301-4 TOC-06
4.2 4.0 SUPPLY CURRENT (A) 3.8 3.6 3.4 3.2 3.0 2.8 2.6 RESET DEASSERTED NO LOAD
4.20 4.15 4.10 tRP/tWD (ms) 4.05 4.00 3.95 3.90 3.85 3.80 VCC = 5.0V
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V)
-60 -40 -20
0
20
40
60
80 100
TEMPERATURE (C)
TRANSIENT DURATION (s)
RESET THRESHOLD OVERDRIVE (mV)
SUPPLY CURRENT vs. TEMPERATURE
6301-4 TOC-07
RESET IN THRESHOLD VOLTAGE vs. TEMPERATURE
RESET REFERENCE VOLTAGE (V)
6301-4 TOC-08
5.00 4.75 SUPPLY CURRENT (A) 4.50 4.25 4.00 3.75 3.50 3.25 3.00 2.75 2.50 -60 -40 -20 0 20 40 60 VCC = 2.0V VCC = 5.0V RESET DEASSERTED NO LOAD
1.226 1.224 1.222 1.220 1.218 1.216 1.214 -60 -40 -20
80 100
0
20
40
60
80 100
TEMPERATURE (C)
TEMPERATURE (C)
VCC TO RESET DELAY vs. TEMPERATURE (VCC FALLING)
VCC FALLING AT 1mV/s PROPAGATION DELAY (s) 72 68 64 60 56 52 -60 4.00
6301-4 TOC-09
RESET AND WATCHDOG TIMEOUT vs. VCC
6301-4 TOC-10
76
4.16
4.12 tRP/tWP (ms)
4.08
4.04
3.96 -40 -20 0 20 40 60 80 100 2 3 4 5 6 TEMPERATURE (C) SUPPLY VOLTAGE (V)
4
_______________________________________________________________________________________
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog
______________________________________________________________Pin Description
PIN NAME RESET IN GND SRT FUNCTION Reset Input. High-impedance input to the reset comparator. Connect this pin to the center point of an external resistor voltage-divider network to set the reset threshold voltage. The reset threshold voltage is calculated as follows: VRST = 1.22 x (R1 + R2) / R2 (see Typical Operating Circuit). Ground Set Reset-Timeout Input. Connect a capacitor between this input and ground to select the reset timeout period (tRS). Determine the period as follows: tRP = 2.67 x CSRT, with CSRT in pF and tRP in s (see Typical Operating Circuit). Set Watchdog-Timeout Input. Connect a capacitor between this input and ground to select the basic watchdog timeout period (tWD). Determine the period as follows: tWD = 2.67 x CSWT, with CSWT in pF and tWD in s. The watchdog function can be disabled by connecting this pin to ground. Watchdog-Select Input. This input selects the watchdog mode. Connect to ground to select normal mode and the basic watchdog timeout period. Connect to VCC to select extended mode, multiplying the basic timeout period by a factor of 500. A change in the state of this pin resets the watchdog timer to zero. Watchdog Input. A rising or falling transition must occur on this input within the selected watchdog timeout period, or a reset pulse will occur. The capacitor value selected for SWT and the state of WDS determine the watchdog timeout period. The watchdog timer clears and restarts when a transition occurs on WDI or WDS. The watchdog timer is cleared when reset is asserted and restarted after reset deasserts. In the extended watchdog mode (WDS = VCC), the watchdog function can be disabled by driving WDI with a three-stated driver or by leaving WDI unconnected. Open-Drain, Active-Low Reset Output (MAX6301) Push/Pull, Active-Low Reset Output (MAX6303) Open-Drain, Active-High Reset Output (MAX6302) Push/Pull, Active-High Reset Output (MAX6304) Supply Voltage RESET changes from high to low whenever the monitored voltage (VIN) drops below the selected reset threshold (VRST). RESET remains low as long as VIN is below VRST. Once VIN exceeds VRST, RESET remains low for the reset timeout period and then goes high. The watchdog timer triggers a reset pulse (tRP) whenever the watchdog timeout period (tWD) is exceeded. RESET changes from low to high whenever the monitored voltage (VIN) drops below the selected reset threshold (VRST). RESET remains high as long as VIN is below VRST. Once VIN exceeds VRST, RESET remains high for the reset timeout period and then goes low. The watchdog timer triggers a reset pulse (tRP) whenever the watchdog timeout period (tWD) is exceeded.
MAX6301-MAX6304
1
2 3
4
SWT
5
WDS
6
WDI
RESET (MAX6301/3)
7
RESET (MAX6302/4)
8
VCC
_______________________________________________________________________________________
5
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
_______________Detailed Description
Reset Function/Output
The reset output is typically connected to the reset input of a microprocessor (P). A P's reset input starts or restarts the P in a known state. The MAX6301- MAX6304 P supervisory circuits provide the reset logic to prevent code-execution errors during powerup, power-down, and brownout conditions (see Typical Operating Circuit). For the MAX6301/MAX6303, RESET changes from high to low whenever the monitored voltage (VIN ) drops below the reset threshold voltage (V RST ). RESET remains low as long as VIN is below VRST. Once VIN exceeds VRST, RESET remains low for the reset timeout period, then goes high. When a reset is asserted due to a watchdog timeout condition, RESET stays low for the reset timeout period. Anytime reset asserts, the watchdog timer clears. At the end of the reset timeout period, RESET goes high and the watchdog timer is restarted from zero. If the watchdog timeout period is exceeded again, then RESET goes low again. This cycle continues unless WDI receives a transition. On power-up, once VCC reaches 1V, RESET is guaranteed to be a logic low. For information about applications where V CC is less than 1V, see the section Ensuring a Valid RESET/RESET Output Down to VCC = 0V (MAX6303/MAX6304). As VCC rises, RESET remains low. When VIN rises above VRST, the reset timer starts and RESET remains low. When the reset timeout period ends, RESET goes high. On power-down, once VIN goes below VRST, RESET goes low and is guaranteed to be low until VCC droops below 1V. For information about applications where VCC is less than 1V, see the section Ensuring a Valid RESET/RESET Output Down to VCC = 0V (MAX6303/ MAX6304). The MAX6302/MAX6304 active-high RESET output is the inverse of the MAX6301/MAX6303 active-low RESET output, and is guaranteed valid for VCC > 1.31V.
R1 RESET IN R2 VCC 0.1F VIN
MAX6301 MAX6302 MAX6303 MAX6304
VRST = 1.22
+ (R1R2R2)
Figure 1. Calculating the Reset Threshold Voltage (VRST)
R2 can have very high values to minimize current consumption. Set R2 to some conveniently high value (1M, for example) and calculate R1 based on the desired reset threshold voltage, using the following formula: VRST R1 = R2 x - 1 VTH
()
Watchdog Timer
The watchdog circuit monitors the P's activity. If the P does not toggle the watchdog input (WDI) within t WD (user selected), reset asserts. The internal watchdog timer is cleared by reset, by a transition at WDI (which can detect pulses as short as 30ns), or by a transition at WDS. The watchdog timer remains cleared while reset is asserted; as soon as reset is released, the timer starts counting (Figure 2). The MAX6301-MAX6304 feature two modes of watchdog timer operation: normal mode and extended mode. In normal mode (WDS = GND), the watchdog timeout period is determined by the value of the capacitor connected between SWT and ground (see the section Selecting the Reset and Watchdog Timeout Capacitor). In extended mode (WDS = VCC), the watchdog timeout period is multiplied by 500. For example, in the extended mode, a 1F capacitor gives a watchdog timeout period of 22 minutes (see the graph Extended-Mode Watchdog Timeout Period vs. C SWT in the Typical Operating Characteristics). In extended mode, the watchdog function can be disabled by leaving WDI unconnected or by three-stating the driver connected to WDI. In this mode, the watchdog input is internally driven low during the watchdog
Reset Threshold
These supervisors monitor the voltage on RESET IN. The MAX6301-MAX6304 have an adjustable reset threshold voltage (VRST) set with an external resistor voltage divider (Figure 1). Use the following formula to calculate VRST (the point at which the monitored voltage triggers a reset): VTH x R1 + R2 VRST = V R2 where VRST is the desired reset threshold voltage and VTH is the reset input threshold (1.22V). Resistors R1 and
(
)
()
6
_______________________________________________________________________________________
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
VCC WDI 0V VCC RESET 0V NORMAL MODE (WDS = GND) tWD tRP
Figure 2a. Watchdog Timing Diagram, WDS = GND
VCC WDI 0V VCC RESET 0V EXTENDED MODE (WDS = VCC) tWD x 500 tRP
Figure 2b. Watchdog Timing Diagram, WDS = VCC
timeout period, then momentarily pulses high, resetting the watchdog counter. When WDI is left unconnected, the watchdog timer is cleared by this internal driver just before the timeout period is reached (the internal driver pulls WDI high at about 94% of t WD). When WDI is three-stated, the maximum allowable leakage current of the device driving WDI is 10A. In normal mode (WDS = GND), the watchdog timer cannot be disabled by three-stating WDI. WDI is a high-impedance input in this mode. Do not leave WDI unconnected in normal mode.
VCC GND VCC 0.1F
MAX6301 MAX6302 MAX6303 SWT MAX6304
SRT CSRT CSWT
CRST = tRP 2.67 CRST in pF tWD in s
t CSWT = WD 2.67 CSWT in pF tWD in s
Figure 3. Calculating the Reset (CSRT) and Watchdog (CSWT) Timeout Capacitor Values
_______________________________________________________________________________________ 7
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
VIN VCC VCC 80C51 VCC
R1 RESET IN R2 VCC 0.1F
MAX6302
VCC RST
VCC
RESET
MAX6301 MAX6302 MAX6303 MAX6304
WDI WDS GND
*
I/O I/O I/O GND
VRST = 1.22 R1 + R2 R2
(
)
* THREE-STATE LEAKAGE MUST BE <10A.
Figure 4. Monitoring a Voltage Other than VCC
Figure 5. Wake-Up Timer
__________Applications Information
Selecting the Reset and Watchdog Timeout Capacitor
The reset timeout period is adjustable to accommodate a variety of P applications. Adjust the reset timeout period (tRS) by connecting a specific value capacitor (CSRT) between SRT and ground (Figure 3). Calculate the reset timeout capacitor as follows: CSRT = tRP 2.67 with CSRT in pF and tRP in s. CSRT must be a low-leakage (<10nA) type capacitor. Ceramic is recommended. The watchdog timeout period is adjustable to accommodate a variety of P applications. With this feature, the watchdog timeout can be optimized for software execution. The programmer can determine how often the watchdog timer should be serviced. Adjust the watchdog timeout period (tWD) by connecting a specific value capacitor (CSWT) between SWT and ground (Figure 3). For normal-mode operation, calculate the watchdog timeout capacitor as follows: CSWT = tWD 2.67 where CSWT is in pF and tWD is in s. CSRT must be a low leakage (<10nA) type capacitor. Ceramic is recommended.
Wake-Up Timer
In some applications, it is advantageous to put a P into sleep mode, periodically "wake it up" to perform checks and/or tasks, then put it back into sleep mode. The MAX6301 family supervisors can easily accommodate this technique. Figure 5 illustrates an example using the MAX6302 and an 80C51. In Figure 5, just before the C puts itself into sleep mode, it pulls WDS high. The C's I/O pins maintain their logic levels while in sleep mode and WDS remains high. This places the MAX6302 in extended mode, increasing the watchdog timeout 500 times. When the watchdog timeout period ends, a reset is applied on the 80C51, "waking it up" to perform tasks. While the P is performing tasks, the 80C51 pulls WDS low (selecting normal mode), and the MAX6302 monitors the P for hang-ups. When the P finishes its tasks, it puts itself back into sleep mode, drives WDS high, and starts the cycle over again. This is a power-saving technique, since the P is operating only part of the time and the MAX6302 has very low quiescent current.
Adding a Manual Reset Function
A manual reset option can easily be implemented by connecting a normally open momentary switch in parallel with R2 (Figure 6). When the switch is closed, the voltage on RESET IN goes to zero, initiating a reset. When the switch is released, reset remains asserted for the reset timeout period and then is cleared. The pushbutton switch is effectively debounced by the reset timer.
Monitoring Voltages Other than VCC The Typical Operating Circuit monitors VCC. However, monitoring other voltages is simple, and Figure 4 shows a circuit that accomplishes this. Calculate V RST as shown in the Reset Threshold section.
8
_______________________________________________________________________________________
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
VCC VCC R1 RESET IN VCC 0.1F GND VCC P RESET TO OTHER SYSTEM COMPONENTS
MAX6301
VCC 0.1F 4.7k
R2
MAX6301 MAX6302 MAX6303 MAX6304
RESET
RESET
Figure 6. Adding a Manual Reset Function
Figure 7. Interfacing to Ps with Bidirectional Reset I/O Pins
Interfacing to Ps with Bidirectional Reset Pins
Since RESET is open-drain, the MAX6301 interfaces easily with Ps that have bidirectional reset pins, such as the Motorola 68HC11 (Figure 7). Connecting RESET directly to the P's reset pin with a single pull-up allows either device to assert reset.
TO RESET GENERATOR WDI WATCHDOG TIMER
Negative-Going VCC Transients
In addition to issuing a reset to the P during power-up, power-down, and brownout conditions, these supervisors are relatively immune to short-duration negative-going transients (glitches). The graph Maximum Transient Duration vs. Reset Threshold Overdrive in the Typical Operating Characteristics shows this relationship. The area below the curves of the graph is the region in which these devices typically do not generate a reset pulse. This graph was generated using a negativegoing pulse applied to VIN, starting above the actual reset threshold (VRST) and ending below it by the magnitude indicated (reset-threshold overdrive). As the magnitude of the transient increases (farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts 50s or less will not cause a reset pulse to be issued.
MAX6301 MAX6302 TO MODE MAX6303 CONTROL MAX6304
WDS
Figure 8. Watchdog Input Structure
Watchdog Input Current
Extended Mode In extended mode (WDS = VCC), the WDI input is internally driven through a buffer and series resistor from the watchdog counter (Figure 8). When WDI is left unconnected, the watchdog timer is serviced within the
watchdog timeout period by a very brief low-high-low pulse from the counter chain. For minimum watchdog input current (minimum overall power consumption), leave WDI low for the majority of the watchdog timeout period, pulsing it low-high-low (>30ns) once within the period to reset the watchdog timer. If instead WDI is externally driven high for the majority of the timeout period, typically 70A can flow into WDI.
Normal Mode In normal mode (WDS = GND), the internal buffer that drives WDI is disabled. In this mode, WDI is a standard CMOS input and leakage current is typically 100pA, regardless of whether WDI is high or low.
_______________________________________________________________________________________
9
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
VCC VCC 100k VCC 0.1F
MAX6303
VCC 0.1F
MAX6304
RESET 100k GND GND
RESET
Figure 9. Ensuring RESET Valid to VCC = 0V
Figure 10. Ensuring RESET Valid to VCC = 0V
When VCC falls below 1V, RESET/RESET current sinking (sourcing) capabilities decline drastically. In the case of the MAX6303, high-impedance CMOS-logic inputs connected to RESET can drift to undetermined voltages. This presents no problem in most applications, since most Ps and other circuitry do not operate with VCC below 1V. In those applications where RESET must be valid down to 0V, adding a pull-down resistor between RESET and ground sinks any stray leakage currents, holding RESET low (Figure 9). The value of the pull-down resistor is not critical; 100k is large enough not to load RESET and small enough to pull RESET to ground. For applications using the MAX6304, a 100k pull-up resistor between RESET and VCC will hold RESET high when VCC falls below 1V (Figure 10).
Ensuring a Valid RESET/RESET Output Down to VCC = 0V (MAX6303/MAX6304)
START
SET WDI LOW
SUBROUTINE OR PROGRAM LOOP SET WDI HIGH
RETURN
END
Watchdog-Software Considerations
To help the watchdog timer monitor software execution more closely, set and reset the watchdog input at different points in the program, rather than "pulsing" the watchdog input high-low-high or low-high-low. This technique avoids a "stuck" loop in which the watchdog timer would continue to be reset within the loop, keeping the watchdog from timing out. Figure 11 shows an example of a flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, set low at the beginning of every subroutine or loop, then set high again when the program returns to the beginning. If the program should "hang" in any subroutine the problem would quickly be
Figure 11. Watchdog Flow Diagram
corrected, since the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. When using extended mode, as described in the Watchdog Input Current section, this scheme does result in higher average WDI input current than does the method of leaving WDI low for the majority of the timeout period and periodically pulsing it low-high-low.
10
______________________________________________________________________________________
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog
_____________Layout Considerations
SRT and SWT are precision current sources. When developing the layout for the application, be careful to minimize board capacitance and leakage currents around these pins. Traces connected to these pins should be kept as short as possible. Traces carrying high-speed digital signals and traces with large voltage potentials should be routed as far from these pins as possible. Leakage currents and stray capacitance (e.g., a scope probe) at these pins could cause errors in the reset and/or watchdog timeout period. When evaluating these parts, use clean prototype boards to ensure accurate reset and watchdog timeout periods. RESET IN is a high-impedance input which is typically driven by a high-impedance resistor-divider network (e.g., 1M to 10M). Minimize coupling to transient signals by keeping the connections to this input short. Any DC leakage current at RESET IN (e.g., a scope probe) causes errors in the programmed reset threshold. Note that sensitive pins are located on the GND side of the device, away from the digital I/O, to simplify board layout.
__Ordering Information (continued)
PART MAX6302CPA MAX6302CSA MAX6302CUA MAX6302EPA MAX6302ESA MAX6303CPA MAX6303CSA MAX6303CUA MAX6303EPA MAX6303ESA MAX6304CPA MAX6304CSA MAX6304CUA MAX6304EPA MAX6304ESA TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C PIN-PACKAGE 8 Plastic DIP 8 SO 8 MAX 8 Plastic DIP 8 SO 8 Plastic DIP 8 SO 8 MAX 8 Plastic DIP 8 SO 8 Plastic DIP 8 SO 8 MAX 8 Plastic DIP 8 SO
MAX6301-MAX6304
___________________Chip Information
TRANSISTOR COUNT: 580
______________________________________________________________________________________
11
+5V, Low-Power P Supervisory Circuits with Adjustable Reset/Watchdog MAX6301-MAX6304
________________________________________________________Package Information
DIM
C A 0.101mm 0.004 in B A1 L
e
A A1 B C D E e H L
INCHES MAX MIN 0.044 0.036 0.008 0.004 0.014 0.010 0.007 0.005 0.120 0.116 0.120 0.116 0.0256 0.198 0.188 0.026 0.016 6 0
MILLIMETERS MIN MAX 0.91 1.11 0.10 0.20 0.25 0.36 0.13 0.18 2.95 3.05 2.95 3.05 0.65 4.78 5.03 0.41 0.66 0 6
21-0036D
E
H
8-PIN MAX MICROMAX SMALL-OUTLINE PACKAGE
D
DIM
D A e B
0.101mm 0.004in.
0-8
A1
C
L
A A1 B C E e H L
INCHES MAX MIN 0.069 0.053 0.010 0.004 0.019 0.014 0.010 0.007 0.157 0.150 0.050 0.244 0.228 0.050 0.016
MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 3.80 4.00 1.27 5.80 6.20 0.40 1.27
E
H
Narrow SO SMALL-OUTLINE PACKAGE (0.150 in.)
DIM PINS D D D 8 14 16
INCHES MILLIMETERS MIN MAX MIN MAX 0.189 0.197 4.80 5.00 0.337 0.344 8.55 8.75 0.386 0.394 9.80 10.00
21-0041A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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